A digital filter is any electronic filter that works by performing digital mathematical operations on an intermediate form of a signal. This is in contrast to analog filters which work entirely in the analog realm and must rely on physical networks of electronic components (such as resistors, capacitors, transistors, etc) to achieve the desired filtering effect.
Digital filters are very flexible and can achieve virtually any filtering effect that can be expressed as a mathematical function or algorithm. The two primary limitations of digital filters are speed (the filter can't operate any faster than the processor at the heart of the filter), and cost. However as the cost of integrated circuits continues to drop over time, digital filters have become increasingly commonplace and are now an essential element of many everyday objects such as radios, cellphones, and stereo receivers.
Digital filters may be implemented in programmable logic devices (PLDs) and programmable system on a chip devices (such the PSoC microcontroller, a trademark of Cypress Semiconductor Corp.). Digital filters may also be implemented in field programmable gate arrays (FPGAs), or in microprocessors (using either hardware or software implementations).
FIG. 1 shows a first conventional 1 pole filter circuit 100. The circuit 100 comprises an input voltage 110 (Vin) coupled to a difference function 120. The difference function 120 outputs a difference voltage 130 which is passed to a divider 140. The output of the divider 140 is coupled to a summing function 150, the output of which is coupled to accumulator 160. Accumulator 160 accumulates the difference value with the previous output voltage Vout. The accumulator 160 generates an output voltage 170 (Vout). The output voltage 170 is coupled back via a feedback path 180 to the summing function 150 and to the difference function 120.
FIG. 2 shows a second conventional n-bit filter circuit 200. The circuit 200 comprises an n-bit input voltage 210 (Vin) coupled to a difference function 220. The n-bit input is a digital word for example an 8-bit or 16-bit wide word, or any other width word. The difference function 220 outputs a difference voltage 230 which is passed to a divider 240. The output of the divider 240 is coupled to a summing function 250, the output of which is coupled to an accumulator function 260 which has an output voltage 270 (Vout). The output n-bit voltage 270 is coupled back via a feedback path 280 to the summing function 250 and to the difference function 220.
FIG. 3 shows a third conventional filter circuit 300. The circuit 300 comprises an n-bit input voltage 310 (Vin) coupled to a n-bit to m-bit converter 315. The m-bit output of the converter 315 is passed to a difference function 320. The difference function 320 outputs a m-bit difference voltage 330 which is passed to a divider 340. The m-bit output of the divider 340 is coupled to a summing function 350, the output of which is coupled to an accumulator 360 which has an m-bit output voltage 380 (Vout). The output n-bit voltage 180 is coupled back via a feedback path to the summing function 350 and to the difference function 320. The m-bit output voltage 380 is coupled to a m-bit to n-bit converter 365, which outputs an n-bit output voltage 370 (Vout).
Conventional filter solutions work well for analog (infinite resolution) implementations, because infinite resolution is available in its storage elements. but when the analog signals are digitized they now have a finite resolution. Any division of this value causes values less than the assigned quantization.
In a conventional filter, as the value of the divider gets greater, the residue (amount left over after a divide by operation) increases. For example in an operation to divide 15 by 4, the result is 3 (since 4*3=12, the biggest multiplicand of 4 less than 15) with a residue of 3 (15−12=3). In a divide by 4 operation, the residue can be 0, 1, 2, or 3. As a result, 2 bits of memory are required to represent the residue. Similarly, for a divide by 8 operation, 3 bits of memory are required to represent the residue. So as the divide value (and the filter resolution) grows, the memory required for the residue increases. In embedded systems where memory is at a premium, this can be a problem.
The residue is used to allow the filter to converge to an accurate representation of the analog value. By storing and summing the residues the quantization error can be accumulated and the filter can converge (reach the most accurate representation) of an analog value input. If due to memory limitations (for example in embedded devices where memory is scarce) the residue value is discarded, then the filter will never fully converge to the ideal value, i.e. the most accurate representation of the input. So to reach an accurate representation, extra (and often costly) memory may be required. Furthermore, if the divider value can change on the fly (during operation) then the conventional solution requires a memory large enough for use with the largest (worst case) divider.